Florent Kermarrec f014e4cbd2 tools/litex_client: Add filter parameter to dump_registrers to only dump/display the filtered registers: ... ex: litex_cli --regs --filter=pcie_phy will only dump/display pcie_phy registers.		2021-04-13 13:44:41 +02:00
..
remote	tools/remote/comm_pcie: fix typo.	2021-02-19 10:33:04 +01:00
__init__.py
litex_client.py	tools/litex_client: Add filter parameter to dump_registrers to only dump/display the filtered registers:	2021-04-13 13:44:41 +02:00
litex_gen.py	tools: add SPDX License identifier to header and specify file is part of LiteX.	2020-08-23 15:37:16 +02:00
litex_json2dts.py	json2dts: add the framebuffer memory in the 'reserved-memory' entry, so that Linux doesn't try to use it for something else.	2021-04-06 13:44:50 +02:00
litex_read_verilog.py	tools: add SPDX License identifier to header and specify file is part of LiteX.	2020-08-23 15:37:16 +02:00
litex_server.py	tools/litex_server: remove JTAGUART's binary_mode parameter (we are now only supporting binary_mode).	2021-02-05 12:38:20 +01:00
litex_sim.py	litex_sim: Switch to soc_core_args/soc_core_argdict.	2021-03-24 17:26:48 +01:00
litex_term.py	tools/litex_term: replace CrossoverUART with BridgeUART for more genericity, rework bridge/jtag args.	2021-02-18 18:02:05 +01:00