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78a9579e09
litex
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litex
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soc
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Florent Kermarrec
78a9579e09
cores/uart/RS232PHYTX: fix startbit duration by pre-loading phase_accumulator_tx to tuning_word.
2020-05-25 10:46:53 +02:00
..
cores
cores/uart/RS232PHYTX: fix startbit duration by pre-loading phase_accumulator_tx to tuning_word.
2020-05-25 10:46:53 +02:00
doc
soc/doc/csr: allow CSRField.reset to be a Migen Constant.
2020-03-23 18:47:41 +01:00
integration
integration/soc: remove TODO in header.
2020-05-23 18:54:04 +02:00
interconnect
integration/soc: review/simplify changes for standalone cores.
2020-05-12 16:18:26 +02:00
software
Merge pull request
#535
from antmicro/arty-cv32e40p
2020-05-22 13:44:10 +02:00
__init__.py
litex: reorganize things, first work working version
2015-11-07 17:48:55 +01:00