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https://github.com/enjoy-digital/litex.git
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7b464b2b1c
litex
/
misoclib
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Florent Kermarrec
7b464b2b1c
litesata: create specialized kc705 platform to avoid duplicating things already in mibuild
2015-03-01 11:03:15 +01:00
..
com
liteeth: create example design derived from SoC that can be used on all targets with Ethernet pins
2015-02-28 23:33:00 +01:00
cpu
litescope: create example design derived from SoC that can be used on all targets
2015-02-28 22:19:24 +01:00
mem
litesata: create specialized kc705 platform to avoid duplicating things already in mibuild
2015-03-01 11:03:15 +01:00
others
move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future)
2015-02-28 11:51:51 +01:00
soc
soc: fix register_rom
2015-02-28 23:51:51 +01:00
tools
litescope: avoid uart code duplication
2015-03-01 10:07:55 +01:00
video
video: reintegrate dvisampler from mixxeo (DVI/HDMI interfaces are common in today's SoCs)
2015-03-01 10:07:52 +01:00
__init__.py
rename milkymist-ng to MiSoC
2013-11-09 15:27:32 +01:00