Florent Kermarrec 1d4dc45436 LiteXXX cores: use format in prints		2015-03-03 10:29:28 +01:00
..
platforms	litesata: remove unneeded clock constraint	2015-03-03 10:24:05 +01:00
targets	liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen	2015-03-01 16:48:41 +01:00
test	LiteXXX cores: use format in prints	2015-03-03 10:29:28 +01:00
make.py	litesata: create example design derived from SoC	2015-03-01 11:33:38 +01:00