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7fe748e1b0
litex
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misoclib
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mem
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Florent Kermarrec
7fe748e1b0
sdram/module: clean up tREFI. (use 64ms/8k or 4k)
2015-03-28 01:09:21 +01:00
..
flash
spiflash: style
2015-03-03 00:54:30 +00:00
litesata
litexxx cores: use default baudrate of 115200 for all tests
2015-03-20 12:22:53 +01:00
sdram
sdram/module: clean up tREFI. (use 64ms/8k or 4k)
2015-03-28 01:09:21 +01:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00