litex/migen/fhdl
Sebastien Bourdeauducq 34c69db14a endpoint: add _i/_o suffix on signal names 2012-01-07 21:21:46 +01:00
..
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00
autofragment.py Pay a bit more attention to PEP8 2011-12-16 16:02:55 +01:00
structure.py endpoint: add _i/_o suffix on signal names 2012-01-07 21:21:46 +01:00
tools.py verilog: split comb block, use assign statements 2012-01-07 12:19:06 +01:00
verilog.py verilog: split comb block, use assign statements 2012-01-07 12:19:06 +01:00