litex/targets
Florent Kermarrec 158fbe49ac sdram/phy/s6ddrphy: rename S6DDRPHY to S6HalfRateDDRPHY and use ORed wrdata_en/rddata_en (the controller already manages that) 2015-08-22 11:47:26 +02:00
..
__init__.py add support for external platforms and targets 2013-11-24 16:55:33 +01:00
de0nano.py global: more pep8 2015-04-13 18:02:26 +02:00
kc705.py rename shadow_address to shadow_base (more appropriate) and use | instead of + (as done in artiq) 2015-05-02 17:07:58 +02:00
minispartan6.py targets/minispartan6: add USBSoC (working, should also be usable on pipistrello) 2015-05-01 16:22:45 +02:00
mlabs_video.py sdram/phy/s6ddrphy: rename S6DDRPHY to S6HalfRateDDRPHY and use ORed wrdata_en/rddata_en (the controller already manages that) 2015-08-22 11:47:26 +02:00
pipistrello.py sdram/phy/s6ddrphy: rename S6DDRPHY to S6HalfRateDDRPHY and use ORed wrdata_en/rddata_en (the controller already manages that) 2015-08-22 11:47:26 +02:00
ppro.py global: more pep8 2015-04-13 18:02:26 +02:00
simple.py rename shadow_address to shadow_base (more appropriate) and use | instead of + (as done in artiq) 2015-05-02 17:07:58 +02:00
versa.py global: more pep8 2015-04-13 18:02:26 +02:00