litex/migen
Florent Kermarrec 9cabcf14e9 migen/genlib/record: add leave_out parameter to connect
Modules doing dataflow adaptation often need to connect most of the signals between endpoints except the one concerned by the adaptation.
This new parameter ease that by avoid manual connection of all signals.
2015-05-23 13:59:09 +02:00
..
actorlib migen/actorlib/spi: apply missing CSR renaming 2015-05-13 10:17:31 +02:00
bank global: pep8 (E261, E271) 2015-04-13 21:21:30 +02:00
bus global: more pep8 2015-04-13 21:33:44 +02:00
fhdl migen/fhdl/verilog: _printheader/_printcomb, remove default value of arguments which are not used in internal functions. (thanks sb) 2015-04-24 12:54:08 +02:00
flow global: pep8 (E302) 2015-04-13 20:45:35 +02:00
genlib migen/genlib/record: add leave_out parameter to connect 2015-05-23 13:59:09 +02:00
sim vpi: cleanup (thanks sb) 2015-05-13 10:13:14 +02:00
test add examples tests 2015-05-01 00:50:17 +08:00
util global: pep8 (E302) 2015-04-13 20:45:35 +02:00
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00