This website requires JavaScript.
Explore
Help
Sign In
Hardware
/
litex
mirror of
https://github.com/enjoy-digital/litex.git
Watch
1
Star
0
Fork
You've already forked litex
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
9e784fc82c
litex
/
misoclib
/
gensoc
History
Sebastien Bourdeauducq
9e784fc82c
Generate mem.h from SoC description
2014-02-21 17:55:05 +01:00
..
__init__.py
gensoc: support for user-defined UART and add default values for SRAM and L2 sizes
2014-01-06 22:12:42 +01:00
cpuif.py
Generate mem.h from SoC description
2014-02-21 17:55:05 +01:00