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Build your hardware, easily!
12 commits 42 branches 14 tags 31 MiB
C 52.6%
Python 43.7%
Assembly 1.4%
SystemVerilog 1.3%
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Sebastien Bourdeauducq a6b86168ce Simple bus base class
2011-12-08 18:47:32 +01:00
examples Instance support 2011-12-08 16:35:32 +01:00
migen Simple bus base class 2011-12-08 18:47:32 +01:00
.gitignore Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00