litex/misoclib/com/liteeth/phy
Florent Kermarrec afa9b889ae liteeth/phy/gmii: fix clock generation for mii mode (clock_pads.tx is an input) 2015-04-12 22:15:45 +02:00
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__init__.py liteeth/phy/__init__.py: add more comments 2015-04-12 18:56:46 +02:00
gmii.py liteeth/phy/gmii: fix clock generation for mii mode (clock_pads.tx is an input) 2015-04-12 22:15:45 +02:00
gmii_mii.py liteeth/phy/gmii: fix clock generation for mii mode (clock_pads.tx is an input) 2015-04-12 22:15:45 +02:00
loopback.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
mii.py liteeth/phy/gmii_mii: avoid doubling pads register on TX 2015-04-12 20:42:12 +02:00
sim.py liteeth/phy/sim: create ethernet tap in __init__ and destroy it in do_exit 2015-03-09 17:21:29 +01:00