42 lines
1.1 KiB
Python
42 lines
1.1 KiB
Python
from migen.fhdl.std import *
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from migen.genlib.io import *
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from migen.genlib.resetsync import AsyncResetSynchronizer
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class LatticeAsyncResetSynchronizerImpl(Module):
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def __init__(self, cd, async_reset):
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rst1 = Signal()
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self.specials += [
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Instance("FD1S3BX", i_D=0, i_PD=async_reset,
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i_CK=cd.clk, o_Q=rst1),
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Instance("FD1S3BX", i_D=rst1, i_PD=async_reset,
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i_CK=cd.clk, o_Q=cd.rst)
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]
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class LatticeAsyncResetSynchronizer:
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@staticmethod
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def lower(dr):
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return LatticeAsyncResetSynchronizerImpl(dr.cd, dr.async_reset)
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class LatticeDDROutputImpl(Module):
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def __init__(self, i1, i2, o, clk):
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self.specials += Instance("ODDRXD1",
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synthesis_directive="ODDRAPPS=\"SCLK_ALIGNED\"",
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i_SCLK=clk,
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i_DA=i1, i_DB=i2, o_Q=o,
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)
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class LatticeDDROutput:
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@staticmethod
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def lower(dr):
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return LatticeDDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
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lattice_special_overrides = {
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AsyncResetSynchronizer: LatticeAsyncResetSynchronizer,
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DDROutput: LatticeDDROutput
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}
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