litex/litex/build/sim
2020-05-21 09:06:29 +02:00
..
core build/sim: rename dut to sim (for consistency with other builds). 2020-05-21 09:06:29 +02:00
__init__.py
common.py
config.py add CONTRIBUTORS file and add copyright header to all files 2019-06-23 23:23:56 +02:00
platform.py build/sim: rename dut to sim (for consistency with other builds). 2020-05-21 09:06:29 +02:00
README litex/build/sim: add README 2017-06-28 16:55:32 +02:00
verilator.py build/sim: rename dut to sim (for consistency with other builds). 2020-05-21 09:06:29 +02:00

LiteX Sim is a contribution from LambdaConcept and provides
a modular SoC simulation environment.

The contribution from LambdaConcept is a major rework/refactoring
of the original simulation environnment PoC that was hacky and not
modular.

LiteX Sim is Copyright (c) 2017 Pierre-Olivier Vauboin <po@lambdaconcept.com>
                           2017 Ramtin Amin <ramtin@lambdaconcept.com>

Original PoC is Copyright (c) 2015-2016 Florent Kermarrec <florent@enjoy-digital.fr>