Sebastien Bourdeauducq 17b2588321 ddrphy: reads OK, write data coming out 1/2 cycle too late		2012-02-24 15:05:52 +01:00
..
Makefile	bios: DDR initialization skeleton	2012-02-17 18:47:04 +01:00
crt0.S	BIOS: hello world	2012-02-05 20:01:28 +01:00
ddrinit.c	ddrphy: reads OK, write data coming out 1/2 cycle too late	2012-02-24 15:05:52 +01:00
ddrinit.h	dfii: new design	2012-02-23 21:21:07 +01:00
isr.c	software: enable -Wmissing-prototypes	2012-02-07 13:02:06 +01:00
linker.ld	BIOS: hello world	2012-02-05 20:01:28 +01:00
main.c	dfii: new design	2012-02-23 21:21:07 +01:00