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bdb47e7977
litex
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misoclib
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gensoc
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Sebastien Bourdeauducq
ad974a07ef
gensoc: support for user-defined UART and add default values for SRAM and L2 sizes
2014-01-06 22:12:42 +01:00
..
__init__.py
gensoc: support for user-defined UART and add default values for SRAM and L2 sizes
2014-01-06 22:12:42 +01:00
cpuif.py
generate linker memory map, move all generated files into the same folder
2013-11-24 19:50:17 +01:00