Florent Kermarrec b75e4b237d software/bios/memtest: add data bus test (0xAAAAAAAA, 0x55555555) on a small portion of the test zone. ... we now need to add another random addressing test to avoid linear access on L2 cache		2015-03-21 20:29:15 +01:00
..
Makefile	Initial mor1kx (OpenRISC) support	2014-05-14 10:24:56 +02:00
boot-helper-lm32.S	bios: fix boot for or1k	2014-05-14 15:01:02 +02:00
boot-helper-or1k.S	bios: fill delay slot in boot_helper	2014-05-14 16:08:25 +02:00
boot.c	cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases)	2015-03-02 16:52:17 +01:00
boot.h	Remove some boilerplate	2012-05-24 19:22:27 +02:00
dataflow.c	bios/dataflow: use freeze register	2012-08-04 23:39:29 +02:00
dataflow.h	bios: add command to print df debug info	2012-08-03 18:51:39 +02:00
isr.c	software: factorize exception_handler	2014-05-14 15:01:38 +02:00
linker.ld	Initial mor1kx (OpenRISC) support	2014-05-14 10:24:56 +02:00
main.c	cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases)	2015-03-02 16:52:17 +01:00
sdram.c	software/bios/memtest: add data bus test (0xAAAAAAAA, 0x55555555) on a small portion of the test zone.	2015-03-21 20:29:15 +01:00
sdram.h	cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases)	2015-03-02 16:52:17 +01:00