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c77562f44b
litex
/
misoclib
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mem
/
sdram
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Florent Kermarrec
92f81409f2
sdram/module: fix tREFI on AS4C16M16
2015-03-22 03:20:02 +01:00
..
core
sdram: pass sdram_controller_settings to SDRAMSoC
2015-03-21 23:12:18 +01:00
frontend
phy
test
__init__.py
sdram: simplify the way we pass settings to controller and rename ramcon_type to sdram_controller_type (more explicit)
2015-03-21 21:32:39 +01:00
module.py
sdram/module: fix tREFI on AS4C16M16
2015-03-22 03:20:02 +01:00