litex/litex
Florent Kermarrec c8a96b8d79 gen/fhdl/namer: Add update method to HierarchyNode to replace update_hierarchy_node. 2023-11-06 13:52:02 +01:00
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build build: Minor cleanups on get_verilog calls. 2023-11-03 11:04:31 +01:00
compat compat/soc_core: Fix register_mem/rom missing imports. 2022-11-09 19:11:15 +01:00
gen gen/fhdl/namer: Add update method to HierarchyNode to replace update_hierarchy_node. 2023-11-06 13:52:02 +01:00
soc Merge pull request #1825 from enjoy-digital/verilog_improvements 2023-11-06 09:11:40 +01:00
tools tools: litex_server, litex_client and remote: don't hardcode bus address 2023-10-30 16:20:31 +01:00
__init__.py colorer: Avoid duplication and move it to litex/gen. 2022-11-03 09:49:51 +01:00