compat/soc_core: Fix register_mem/rom missing imports.

This commit is contained in:
Florent Kermarrec 2022-11-09 19:11:15 +01:00
parent 7157b4c5e8
commit 1e2ad2250d
1 changed files with 2 additions and 0 deletions

View File

@ -67,10 +67,12 @@ class SoCCoreCompat:
def register_mem(self, name, address, interface, size=0x10000000):
compat_notice("SoCCore.register_mem", date="2022-11-03", info="Switch to SoC.bus.add_slave(...)")
from litex.soc.integration.soc import SoCRegion
self.bus.add_slave(name, interface, SoCRegion(origin=address, size=size))
def register_rom(self, interface, rom_size=0xa000):
compat_notice("SoCCore.register_mem", date="2022-11-03", info="Switch to SoC.bus.add_slave(...)")
from litex.soc.integration.soc import SoCRegion
self.bus.add_slave("rom", interface, SoCRegion(origin=self.cpu.reset_address, size=rom_size))
# Finalization ---------------------------------------------------------------------------------