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litex
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https://github.com/enjoy-digital/litex.git
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c9c11e7aa8
litex
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misoclib
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com
History
Sebastien Bourdeauducq
696819cc7f
move gpio from cpu.peripherals to com
2015-04-02 17:17:33 +08:00
..
gpio
move gpio from cpu.peripherals to com
2015-04-02 17:17:33 +08:00
liteeth
adapt LiteEth to new SoC
2015-04-01 22:50:29 +02:00
liteusb
liteusb: give more generic names to modules: FtdiXXX becomes LiteUSBXXX, move PHY outside of core (builds on minispartan6)
2015-03-22 11:11:37 +01:00
spi
com/spi: use .format in tb
2015-03-03 10:44:05 +01:00
uart
uart/liteeth: only import the phy we are going to use (UARTPHYSim cannot be imported on Windows since based on pty).
2015-03-12 16:57:38 +01:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00