litex/litex
Icenowy Zheng c1d8db396d build/gowin/common: Fix DDRInput
The DDRInput of Gowin seems to be never used and contains a typo that
prevents it from being really used.

Fix this typo.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-08-11 14:56:56 +08:00
..
build build/gowin/common: Fix DDRInput 2023-08-11 14:56:56 +08:00
compat compat/soc_core: Fix register_mem/rom missing imports. 2022-11-09 19:11:15 +01:00
gen gen/genlib/misc/WaitTimer: Cast t to int and minor cosmetic cleanup. 2023-07-31 11:27:47 +02:00
soc cores/spi: Add new SPIMMAP core allowing doing SPI accesses directly from MMAP. 2023-08-04 17:44:54 +02:00
tools tools: Update to new sdcard core name. 2023-07-20 16:29:05 +02:00
__init__.py colorer: Avoid duplication and move it to litex/gen. 2022-11-03 09:49:51 +01:00