litex/litex/soc
2017-07-19 12:18:35 +02:00
..
cores soc/core/uart: add UartStub to enable fast simulation with cpu 2017-07-06 19:19:10 +02:00
integration soc/integration/cpu_interface: do not generate constant access functions when with_access_functions is set to False 2017-07-19 12:18:35 +02:00
interconnect soc/interconnect/wishbonebridge: reset_less optimizations 2017-06-30 19:41:14 +02:00
software soc/software/libbase: fix get_ident 2017-06-28 18:10:56 +02:00
tools soc/tools/remote/etherbone: speed optimization (~20/30%) 2017-07-17 00:25:58 +02:00
__init__.py litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00
MISOC_LICENSE litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00