Florent Kermarrec c6f6d7b491 soc/interconnect/wishbonebridge: reset_less optimizations		2017-06-30 19:41:14 +02:00
..
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00
csr.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
csr_bus.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
csr_eventmanager.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
stream.py	soc/interconnect/stream: improve reset_less support for streams	2017-06-30 19:40:17 +02:00
stream_packet.py	soc/interconnect/stream_packet: reset_less optimizations	2017-06-30 19:40:54 +02:00
stream_sim.py	soc/interconnect/stream_sim: add more genericity to PacketStreamer/PacketLogger to use them for all cores	2016-03-31 00:02:22 +02:00
wishbone.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
wishbone2csr.py	for now use our fork of migen (to be able to simulate our designs)	2015-11-13 18:31:46 +01:00
wishbonebridge.py	soc/interconnect/wishbonebridge: reset_less optimizations	2017-06-30 19:41:14 +02:00