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d2cb41bc63
litex
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misoclib
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com
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liteeth
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example_designs
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Florent Kermarrec
d2cb41bc63
LiteXXX cores: convert port parameter to int if is digit in test/make.py
2015-03-17 15:58:21 +01:00
..
targets
liteeth: use CRG from Migen in base example
2015-03-17 12:11:51 +01:00
test
LiteXXX cores: convert port parameter to int if is digit in test/make.py
2015-03-17 15:58:21 +01:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00
make.py
liteeth: use default programmer in make.py
2015-03-17 12:12:21 +01:00