Florent Kermarrec d73d75007e misoclib/com/uart: cleanup and add irq condition parameters ... - reintroduce RX/TX split (ease comprehension) - use FIFO wrapper function from Migen. - add tx_irq_condition and rx_irq_condition		2015-07-24 12:57:42 +02:00
..
liteeth	liteeth/core: add with_icmp parameter	2015-07-06 21:31:20 +02:00
litepcie	litepcie/frontend/dma: add loop counter (useful to detect missed interrupts)	2015-07-22 22:55:11 +02:00
liteusb	liteusb/core/packet: fix missing ,	2015-05-25 13:53:02 +02:00
spi	global: pep8 (W262)	2015-04-13 17:02:59 +02:00
uart	misoclib/com/uart: cleanup and add irq condition parameters	2015-07-24 12:57:42 +02:00
__init__.py	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00
gpio.py	cores: avoid having too much directories when possible (for simple cores or cores contained in a single file)	2015-05-02 16:22:33 +02:00