litex/misoclib/com/liteusb/test
Florent Kermarrec 603b4cdc8c liteusb: continue refactoring (virtual UART and DMA working on minispartan6)
- rename ft2232h phy to ft245.
- make crc optional
- fix depacketizer
- refactor uart (it's now only a wrapper around standard UART)
- fix and update dma
2015-05-01 16:11:15 +02:00
..
Makefile liteusb: continue refactoring (virtual UART and DMA working on minispartan6) 2015-05-01 16:11:15 +02:00
__init__.py liteusb: begin refactoring and simplification (wip) 2015-04-27 15:22:49 +02:00
common.py
core_tb.py liteusb: continue refactoring and add core_tb (should be almost OK) 2015-04-28 18:58:38 +02:00
ft245_async_tb.py
ft245_sync_tb.py