Florent Kermarrec dbde036162 soc/cores: Re-integrated generic/portable HyperBus/HyperRAM core from LiteHyperBus. ... The generic version of the HyperRAM core is simple enough to be directly integrated in LiteX which avoid an additional dependency.		2022-03-01 09:11:55 +01:00
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build	Merge pull request #1228 from sergachev/master	2022-02-28 11:01:02 +01:00
compat	cores/spi_flash: Deprecate SPI Flash MMAPed cores (Designs have been switched with LiteSPI).	2022-01-07 19:08:03 +01:00
gen	soc/cores/jtag: Review/Cleanup JTAGTAPFSM and avoid specific CorrectedOngoingResetFSM.	2022-01-31 16:07:50 +01:00
soc	soc/cores: Re-integrated generic/portable HyperBus/HyperRAM core from LiteHyperBus.	2022-03-01 09:11:55 +01:00
tools	remote/comm_udp: Increase timeout.	2022-02-16 17:57:24 +01:00
__init__.py