litex/test
Florent Kermarrec 8e1a3880d3 interconnect/avalon: Switch to directory/python package and split mm/st.
Similarly to what is done for AXI and will avoid too complex/large files.
2023-05-08 09:25:16 +02:00
..
__init__.py
test_avalon_mm.py interconnect/avalon: Switch to directory/python package and split mm/st. 2023-05-08 09:25:16 +02:00
test_axi.py test/test_axi/test_axi_width_converter: Rename and cleanup. 2022-12-08 21:39:08 +01:00
test_axi_lite.py
test_axi_stream.py test: Add minimal test_axi_stream test (Just syntax check for now). 2022-09-08 11:53:05 +02:00
test_bitbang.py
test_clock.py cores/clocks/lattice_ecp5: Rename ECP5Delay to ECP5DynamicDelay and adapt style for consistency. 2022-01-25 11:09:15 +01:00
test_code_8b10b.py
test_cpu.py test: Reinstate microwatt and neorv32 2023-02-27 17:46:41 +10:30
test_csr.py soc/interconnect/csr: Add optional support fixed CSR mapping. 2022-10-21 14:47:59 +02:00
test_ecc.py
test_emif.py test: add SPDX License identifier to header and specify file is part of LiteX. 2020-08-23 15:40:21 +02:00
test_fifosyncmacro.py
test_gearbox.py
test_hyperbus.py
test_i2s.py
test_icap.py
test_led.py
test_packet.py
test_prbs.py
test_reduce.py gen/common/Reduce: Add ADD support. 2022-10-28 19:13:27 +02:00
test_spi.py
test_spi_opi.py
test_stream.py
test_timer.py
test_wishbone.py