Florent Kermarrec de698c51e4 sdram: rename self.phy_settings to self.settings (using phy.settings instead of phy.phy_settings seems cleaner)		2015-03-02 11:29:43 +01:00
..
__init__.py	soc: add initial verilator sim support: ./make.py -t simple -p sim build-bitstream :)	2015-03-01 18:25:47 +01:00
cpuif.py	remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)	2015-02-28 11:36:15 +01:00
sdram.py	sdram: rename self.phy_settings to self.settings (using phy.settings instead of phy.phy_settings seems cleaner)	2015-03-02 11:29:43 +01:00