litex/litex
Florent Kermarrec ecca3d801d integration/builder: rename software methods to _prepare_rom_software/_generate_rom_software/_initialize_rom_software. 2020-03-06 14:53:59 +01:00
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boards targets/nexys4ddr: fix sdcard clocker initialization 2020-03-05 09:02:29 -05:00
build build: assume vendor tools are in the PATH and remove automatic sourcing, source and toolchain_path parameters. 2020-03-04 09:13:26 +01:00
gen gen/fhdl/verilog: fix signed init values 2020-01-12 22:06:35 +01:00
soc integration/builder: rename software methods to _prepare_rom_software/_generate_rom_software/_initialize_rom_software. 2020-03-06 14:53:59 +01:00
tools Fix copyrights 2020-03-05 17:44:10 +01:00
__init__.py soc/interconnect: rename stream_packet to packet & cleanup (with retro-compat) 2019-09-30 23:41:07 +02:00