Florent Kermarrec ee27a9e534 soc/cores/bitbang: fix missing self.comb on miso.		2020-02-25 15:57:14 +01:00
..
boards	targets/nexys4ddr: add optional sdcard support	2020-02-19 20:16:13 -05:00
build	build/sim: add Verilator FST tracing support.	2020-02-20 13:53:31 +01:00
gen	gen/fhdl/verilog: fix signed init values	2020-01-12 22:06:35 +01:00
soc	soc/cores/bitbang: fix missing self.comb on miso.	2020-02-25 15:57:14 +01:00
tools	tools: litex_gen: fix missing UART pins	2020-02-25 14:24:29 +01:00
__init__.py	soc/interconnect: rename stream_packet to packet & cleanup (with retro-compat)	2019-09-30 23:41:07 +02:00