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litex/lib/sata
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Florent Kermarrec 9dc6903c55 add identify device to command_tb and revert endianness (seems conform with Lecroy SATA Protocol suite samples) 
it seems endianness is correct by is only printed in LSB first in Lecroy software
 		2014-12-20 13:26:07 +01:00
..
command fix ack in idle in some fsm (implementation behaviour different from simulation) 2014-12-20 01:26:02 +01:00
link change FIS endianness (seems to be little endian) 2014-12-20 12:58:37 +01:00
phy use new submodules collection to expose more fsm an modules 2014-12-19 22:50:35 +01:00
test add identify device to command_tb and revert endianness (seems conform with Lecroy SATA Protocol suite samples) 2014-12-20 13:26:07 +01:00
transport add identify device to command_tb and revert endianness (seems conform with Lecroy SATA Protocol suite samples) 2014-12-20 13:26:07 +01:00
__init__.py use new implicit submodules collection and Pipeline 2014-12-19 01:35:18 +01:00
bist.py use new submodules collection to expose more fsm an modules 2014-12-19 22:50:35 +01:00
common.py use new implicit submodules collection and Pipeline 2014-12-19 01:35:18 +01:00