|
boards
|
platforms/netv2: add pcie pins
|
2020-01-27 08:25:57 +01:00 |
|
build
|
build/altera/quartus: fix fmt_r typo
|
2020-01-30 13:55:13 +01:00 |
|
gen
|
gen/fhdl/verilog: fix signed init values
|
2020-01-12 22:06:35 +01:00 |
|
soc
|
soc_sdram: add l2_reverse parameter
|
2020-01-31 19:18:07 +01:00 |
|
tools
|
tools/litex_sim: add ddr4 PhySettings
|
2020-01-28 14:28:24 +01:00 |
