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f1dc008d32
litex
/
mibuild
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xilinx
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Florent Kermarrec
9210df9e9f
mibuild/xilinx/ise: update synthesis with yosis
2015-08-19 01:12:05 +02:00
..
__init__.py
mibuild/xilinx: Adding programming with the Digilent Adept tools
2015-07-02 16:03:44 +02:00
common.py
mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation
2015-07-02 09:42:12 +02:00
ise.py
mibuild/xilinx/ise: update synthesis with yosis
2015-08-19 01:12:05 +02:00
platform.py
mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation
2015-07-02 09:42:12 +02:00
programmer.py
Merge branch 'master' of
https://github.com/m-labs/migen
2015-07-05 10:53:32 +02:00
vivado.py
mibuild: add support for libraries, move .replace("\\", "/") to generic_platform.py and execute it only on Windows machines.
2015-04-17 00:11:31 +02:00