litex/misoclib/gensoc
Sebastien Bourdeauducq ad974a07ef gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
..
__init__.py gensoc: support for user-defined UART and add default values for SRAM and L2 sizes 2014-01-06 22:12:42 +01:00
cpuif.py generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00