litex/migen/fhdl
Robert Jordens fe67210d77 migen.fhdl.size: add fiter(), fslice(), and freversed()
do not overload __len__, __iter__, __reversed__ as not all valid
expressions (ints and bools) have them. furthermore len([]) is and
should be different from flen([]) (the later raises an error). keep
__getitem__ as an exception that proves the rule ;)
2013-12-03 21:36:33 +01:00
..
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00
decorators.py replace use of __dict__ with dir()/xdir() 2013-11-02 16:03:47 +01:00
edif.py fhdl/edif: adjust for use with mibuild 2013-08-03 10:54:06 +02:00
module.py fhdl: RenameClockDomains decorator 2013-07-26 15:42:14 +02:00
namer.py replace use of __dict__ with dir()/xdir() 2013-11-02 16:03:47 +01:00
size.py migen.fhdl.size: add fiter(), fslice(), and freversed() 2013-12-03 21:36:33 +01:00
specials.py specials/Instance: add PreformattedParam 2013-11-25 12:09:51 +01:00
std.py migen.fhdl.size: add fiter(), fslice(), and freversed() 2013-12-03 21:36:33 +01:00
structure.py fhdl/structure: clarify usage restrictions of LHS Cat 2013-11-29 22:35:53 +01:00
tools.py fhdl: move insert_resets to tools 2013-08-08 11:32:58 +02:00
tracer.py bank: automatic register naming 2013-03-12 15:45:24 +01:00
verilog.py add ternary operator sel ? a : b 2013-08-12 13:15:56 +02:00
visit.py fhdl: do not export Fragment 2013-07-25 18:52:54 +02:00