2016-04-10 08:58:07 -04:00
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RISCV_TOOLS_PREFIX = /opt/riscv32ic/bin/riscv32-unknown-elf-
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CXX = $(RISCV_TOOLS_PREFIX)g++
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CC = $(RISCV_TOOLS_PREFIX)gcc
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AS = $(RISCV_TOOLS_PREFIX)gcc
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2015-11-03 19:12:37 -05:00
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CXXFLAGS = -MD -Os -Wall -std=c++11
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CCFLAGS = -MD -Os -Wall -std=c++11
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LDFLAGS = -Wl,--gc-sections
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LDLIBS = -lstdc++
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2015-11-17 08:22:19 -05:00
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test: testbench.exe firmware32.hex
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2015-11-03 19:12:37 -05:00
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vvp -N testbench.exe
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testbench.exe: testbench.v ../../picorv32.v
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iverilog -o testbench.exe testbench.v ../../picorv32.v
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chmod -x testbench.exe
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2015-11-17 08:22:19 -05:00
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firmware32.hex: firmware.elf start.elf hex8tohex32.py
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2016-04-10 08:58:07 -04:00
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$(RISCV_TOOLS_PREFIX)objcopy -O verilog start.elf start.tmp
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$(RISCV_TOOLS_PREFIX)objcopy -O verilog firmware.elf firmware.tmp
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2015-11-03 19:12:37 -05:00
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cat start.tmp firmware.tmp > firmware.hex
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2015-11-17 08:22:19 -05:00
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python3 hex8tohex32.py firmware.hex > firmware32.hex
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2015-11-03 19:12:37 -05:00
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rm -f start.tmp firmware.tmp
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firmware.elf: firmware.o syscalls.o
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$(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)
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chmod -x firmware.elf
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start.elf: start.S start.ld
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$(CC) -nostdlib -o start.elf start.S -T start.ld $(LDLIBS)
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chmod -x start.elf
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clean:
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rm -f *.o *.d *.tmp start.elf
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2015-11-17 08:22:19 -05:00
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rm -f firmware.elf firmware.hex firmware32.hex
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2015-11-03 19:12:37 -05:00
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rm -f testbench.exe testbench.vcd
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-include *.d
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.PHONY: test clean
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