mirror of https://github.com/YosysHQ/picorv32.git
README Updates
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@ -26,9 +26,13 @@ For even smaller size it is possible disable support for registers `x16`..`x31`
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well as `RDCYCLE[H]`, `RDTIME[H]`, and `RDINSTRET[H]` instructions, turning the
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well as `RDCYCLE[H]`, `RDTIME[H]`, and `RDINSTRET[H]` instructions, turning the
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processor into an RV32E core.
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processor into an RV32E core.
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Furthermore it is possible to choose between a single-port and a dual-port
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register file implementation. The former provides better performance while
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the latter results in a smaller core.
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*Note: In architectures that implement the register file in dedicated memory
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*Note: In architectures that implement the register file in dedicated memory
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resources, such as many FPGAs, disabling the 16 upper registers may not further
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resources, such as many FPGAs, disabling the 16 upper registers and/or
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reduce the core size.*
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disabling the dual-port register file may not further reduce the core size.*
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The core exists in two variations: `picorv32` and `picorv32_axi`. The former
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The core exists in two variations: `picorv32` and `picorv32_axi`. The former
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provides a simple native memory interface, that is easy to use in simple
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provides a simple native memory interface, that is easy to use in simple
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