mirror of https://github.com/YosysHQ/picorv32.git
Improve test firmware, increase testbench memory size to 128kB
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
parent
3bb692a954
commit
392ee1dd91
4
Makefile
4
Makefile
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@ -4,7 +4,7 @@ RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX = /opt/riscv32
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SHELL = bash
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SHELL = bash
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
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FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
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FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/hello.o firmware/sieve.o firmware/multest.o firmware/stats.o
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GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
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GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
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GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
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GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
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TOOLCHAIN_PREFIX = $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)i/bin/riscv32-unknown-elf-
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TOOLCHAIN_PREFIX = $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)i/bin/riscv32-unknown-elf-
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@ -92,7 +92,7 @@ synth.v: picorv32.v scripts/yosys/synth_sim.ys
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yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
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yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
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firmware/firmware.hex: firmware/firmware.bin firmware/makehex.py
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firmware/firmware.hex: firmware/firmware.bin firmware/makehex.py
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python3 firmware/makehex.py $< 16384 > $@
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python3 firmware/makehex.py $< 32768 > $@
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firmware/firmware.bin: firmware/firmware.elf
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firmware/firmware.bin: firmware/firmware.elf
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$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
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$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
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@ -20,6 +20,9 @@ void print_str(const char *p);
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void print_dec(unsigned int val);
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void print_dec(unsigned int val);
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void print_hex(unsigned int val, int digits);
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void print_hex(unsigned int val, int digits);
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// hello.c
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void hello(void);
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// sieve.c
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// sieve.c
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void sieve(void);
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void sieve(void);
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@ -28,6 +31,10 @@ uint32_t hard_mul(uint32_t a, uint32_t b);
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uint32_t hard_mulh(uint32_t a, uint32_t b);
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uint32_t hard_mulh(uint32_t a, uint32_t b);
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uint32_t hard_mulhsu(uint32_t a, uint32_t b);
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uint32_t hard_mulhsu(uint32_t a, uint32_t b);
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uint32_t hard_mulhu(uint32_t a, uint32_t b);
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uint32_t hard_mulhu(uint32_t a, uint32_t b);
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uint32_t hard_div(uint32_t a, uint32_t b);
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uint32_t hard_divu(uint32_t a, uint32_t b);
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uint32_t hard_rem(uint32_t a, uint32_t b);
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uint32_t hard_remu(uint32_t a, uint32_t b);
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void multest(void);
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void multest(void);
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// stats.c
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// stats.c
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@ -0,0 +1,14 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#include "firmware.h"
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void hello(void)
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{
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print_str("hello world\n");
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}
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@ -17,15 +17,35 @@ static uint32_t xorshift32(void) {
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void multest(void)
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void multest(void)
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{
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{
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for (int i = 0; i < 10; i++)
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for (int i = 0; i < 15; i++)
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{
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{
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uint32_t a = xorshift32();
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uint32_t a = xorshift32();
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uint32_t b = xorshift32();
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uint32_t b = xorshift32();
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switch (i)
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{
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case 0:
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a = 0x80000000;
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b = 0xFFFFFFFF;
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break;
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case 1:
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a = 0;
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b = 0;
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break;
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case 2:
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a |= 0x80000000;
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b = 0;
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break;
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case 3:
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a &= 0x7FFFFFFF;
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b = 0;
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break;
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}
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uint64_t au = a, bu = b;
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uint64_t au = a, bu = b;
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int64_t as = (int32_t)a, bs = (int32_t)b;
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int64_t as = (int32_t)a, bs = (int32_t)b;
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print_str("input [");
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print_str("input [");
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print_hex(as >> 32, 8);
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print_hex(as >> 32, 8);
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print_str("] ");
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print_str("] ");
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print_hex(a, 8);
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print_hex(a, 8);
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@ -36,7 +56,7 @@ void multest(void)
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print_chr('\n');
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print_chr('\n');
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uint32_t h_mul, h_mulh, h_mulhsu, h_mulhu;
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uint32_t h_mul, h_mulh, h_mulhsu, h_mulhu;
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print_str("hard ");
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print_str("hard mul ");
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h_mul = hard_mul(a, b);
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h_mul = hard_mul(a, b);
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print_hex(h_mul, 8);
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print_hex(h_mul, 8);
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@ -55,7 +75,7 @@ void multest(void)
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print_chr('\n');
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print_chr('\n');
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uint32_t s_mul, s_mulh, s_mulhsu, s_mulhu;
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uint32_t s_mul, s_mulh, s_mulhsu, s_mulhu;
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print_str("soft ");
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print_str("soft mul ");
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s_mul = a * b;
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s_mul = a * b;
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print_hex(s_mul, 8);
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print_hex(s_mul, 8);
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@ -80,6 +100,52 @@ void multest(void)
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}
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}
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print_str(" OK\n");
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print_str(" OK\n");
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uint32_t h_div, h_divu, h_rem, h_remu;
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print_str("hard div ");
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h_div = hard_div(a, b);
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print_hex(h_div, 8);
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print_str(" ");
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h_divu = hard_divu(a, b);
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print_hex(h_divu, 8);
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print_str(" ");
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h_rem = hard_rem(a, b);
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print_hex(h_rem, 8);
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print_str(" ");
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h_remu = hard_remu(a, b);
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print_hex(h_remu, 8);
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print_chr('\n');
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uint32_t s_div, s_divu, s_rem, s_remu;
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print_str("soft div ");
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s_div = b ? as / bs : 0xffffffff;
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print_hex(s_div, 8);
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print_str(" ");
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s_divu = b ? au / bu : 0xffffffff;
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print_hex(s_divu, 8);
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print_str(" ");
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s_rem = b ? as % bs : a;
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print_hex(s_rem, 8);
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print_str(" ");
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s_remu = b ? au % bu : a;
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print_hex(s_remu, 8);
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print_str(" ");
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if (s_div != h_div || s_divu != h_divu || s_rem != h_rem || s_remu != h_remu) {
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print_str("ERROR!\n");
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__asm__ volatile ("ebreak");
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return;
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}
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print_str(" OK\n");
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}
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}
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}
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}
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@ -8,9 +8,10 @@ means.
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*/
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*/
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MEMORY {
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MEMORY {
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/* the memory in the testbench is 64k in size;
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/* the memory in the testbench is 128k in size;
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* set LENGTH=48k and leave at least 16k for stack */
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* set LENGTH=96k and leave at least 32k for stack */
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mem : ORIGIN = 0x00000000, LENGTH = 0x0000c000
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mem : ORIGIN = 0x00000000, LENGTH = 0x0000c000
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mem : ORIGIN = 0x00000000, LENGTH = 0x00018000
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}
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}
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SECTIONS {
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SECTIONS {
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@ -6,6 +6,7 @@
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// means.
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// means.
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#define ENABLE_QREGS
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#define ENABLE_QREGS
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#define ENABLE_HELLO
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#define ENABLE_RVTST
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#define ENABLE_RVTST
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#define ENABLE_SIEVE
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#define ENABLE_SIEVE
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#define ENABLE_MULTST
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#define ENABLE_MULTST
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@ -24,12 +25,17 @@
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.section .text
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.section .text
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.global irq
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.global irq
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.global hello
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.global sieve
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.global sieve
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.global multest
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.global multest
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.global hard_mul
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.global hard_mul
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.global hard_mulh
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.global hard_mulh
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.global hard_mulhsu
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.global hard_mulhsu
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.global hard_mulhu
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.global hard_mulhu
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.global hard_div
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.global hard_divu
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.global hard_rem
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.global hard_remu
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.global stats
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.global stats
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reset_vec:
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reset_vec:
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@ -372,6 +378,14 @@ start:
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addi x30, zero, 0
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addi x30, zero, 0
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addi x31, zero, 0
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addi x31, zero, 0
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#ifdef ENABLE_HELLO
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/* set stack pointer */
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lui sp,(128*1024)>>12
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/* call hello C code */
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jal ra,hello
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#endif
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/* running tests from riscv-tests */
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/* running tests from riscv-tests */
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#ifdef ENABLE_RVTST
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#ifdef ENABLE_RVTST
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TEST(simple)
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TEST(simple)
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/* set stack pointer */
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/* set stack pointer */
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lui sp,(64*1024)>>12
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lui sp,(128*1024)>>12
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/* set gp and tp */
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/* set gp and tp */
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lui gp, %hi(0xdeadbeef)
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lui gp, %hi(0xdeadbeef)
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mulhu a0, a0, a1
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mulhu a0, a0, a1
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ret
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ret
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hard_div:
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div a0, a0, a1
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ret
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hard_divu:
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divu a0, a0, a1
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ret
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hard_rem:
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rem a0, a0, a1
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ret
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hard_remu:
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remu a0, a0, a1
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ret
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@ -305,7 +305,7 @@ module axi4_memory #(
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output reg tests_passed
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output reg tests_passed
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);
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);
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reg [31:0] memory [0:64*1024/4-1] /* verilator public */;
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reg [31:0] memory [0:128*1024/4-1] /* verilator public */;
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reg verbose;
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reg verbose;
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initial verbose = $test$plusargs("verbose") || VERBOSE;
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initial verbose = $test$plusargs("verbose") || VERBOSE;
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@ -383,7 +383,7 @@ module axi4_memory #(
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task handle_axi_rvalid; begin
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task handle_axi_rvalid; begin
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if (verbose)
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if (verbose)
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$display("RD: ADDR=%08x DATA=%08x%s", latched_raddr, memory[latched_raddr >> 2], latched_rinsn ? " INSN" : "");
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$display("RD: ADDR=%08x DATA=%08x%s", latched_raddr, memory[latched_raddr >> 2], latched_rinsn ? " INSN" : "");
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if (latched_raddr < 64*1024) begin
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if (latched_raddr < 128*1024) begin
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mem_axi_rdata <= memory[latched_raddr >> 2];
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mem_axi_rdata <= memory[latched_raddr >> 2];
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mem_axi_rvalid <= 1;
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mem_axi_rvalid <= 1;
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latched_raddr_en = 0;
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latched_raddr_en = 0;
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task handle_axi_bvalid; begin
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task handle_axi_bvalid; begin
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if (verbose)
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if (verbose)
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$display("WR: ADDR=%08x DATA=%08x STRB=%04b", latched_waddr, latched_wdata, latched_wstrb);
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$display("WR: ADDR=%08x DATA=%08x STRB=%04b", latched_waddr, latched_wdata, latched_wstrb);
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if (latched_waddr < 64*1024) begin
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if (latched_waddr < 128*1024) begin
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if (latched_wstrb[0]) memory[latched_waddr >> 2][ 7: 0] <= latched_wdata[ 7: 0];
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if (latched_wstrb[0]) memory[latched_waddr >> 2][ 7: 0] <= latched_wdata[ 7: 0];
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if (latched_wstrb[1]) memory[latched_waddr >> 2][15: 8] <= latched_wdata[15: 8];
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if (latched_wstrb[1]) memory[latched_waddr >> 2][15: 8] <= latched_wdata[15: 8];
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if (latched_wstrb[2]) memory[latched_waddr >> 2][23:16] <= latched_wdata[23:16];
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if (latched_wstrb[2]) memory[latched_waddr >> 2][23:16] <= latched_wdata[23:16];
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`endif
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`endif
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module picorv32_wrapper #(
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module picorv32_wrapper #(
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parameter BOOTROM_MEMFILE = "",
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parameter BOOTROM_MEMDEPTH = 16384 * 4,
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parameter VERBOSE = 0
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parameter VERBOSE = 0
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) (
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) (
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input wb_clk,
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input wb_clk,
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@ -89,7 +87,7 @@ module picorv32_wrapper #(
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wire wb_s2m_ack;
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wire wb_s2m_ack;
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wb_ram #(
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wb_ram #(
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.depth (16384 * 4),
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.depth (128*1024),
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.VERBOSE (VERBOSE)
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.VERBOSE (VERBOSE)
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) ram ( // Wishbone interface
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) ram ( // Wishbone interface
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.wb_clk_i(wb_clk),
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.wb_clk_i(wb_clk),
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end
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end
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always @(posedge wb_clk_i) begin
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always @(posedge wb_clk_i) begin
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if (waddr2 < 64 * 1024 / 4) begin
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if (waddr2 < 128 * 1024 / 4) begin
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if (we[0])
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if (we[0])
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mem[waddr2][7:0] <= wb_dat_i[7:0];
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mem[waddr2][7:0] <= wb_dat_i[7:0];
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