mirror of https://github.com/YosysHQ/picorv32.git
Removed dead code and cleanup before pull request
This commit is contained in:
Guy Hutchison
parent
73318eaeab
commit
5c0e137792
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@ -14,24 +14,16 @@ test: testbench.vvp firmware32.hex
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vvp -l testbench.log -N testbench.vvp
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testbench.vvp: testbench.v ../../picorv32.v firmware_dbg.v
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iverilog -D WRITE_VCD=1 -o testbench.vvp testbench.v ../../picorv32.v
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iverilog -o testbench.vvp testbench.v ../../picorv32.v
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chmod -x testbench.vvp
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firmware32.hex: firmware.elf hex8tohex32.py
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$(RISCV_TOOLS_PREFIX)objcopy -O verilog firmware.elf firmware.tmp
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python3 hex8tohex32.py firmware.tmp > firmware32.hex
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#firmware32.hex: firmware.elf start.elf hex8tohex32.py
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# $(RISCV_TOOLS_PREFIX)objcopy -O verilog start.elf start.tmp
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# $(RISCV_TOOLS_PREFIX)objcopy -O verilog firmware.elf firmware.tmp
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# cat start.tmp firmware.tmp > firmware.hex
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# python3 hex8tohex32.py firmware.hex > firmware32.hex
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# rm -f start.tmp firmware.tmp
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firmware_dbg.v: firmware.map
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python3 map2debug.py
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#firmware.o: firmware.c
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# $(CC) -c $^
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start.o: start.S
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$(CC) -c -nostdlib start.S $(LDLIBS)
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@ -40,10 +32,6 @@ firmware.elf: firmware.o syscalls.o start.o
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$(CC) $(LDFLAGS),-Map=firmware.map -o $@ $^ -T sections.lds $(LDLIBS)
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chmod -x firmware.elf
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start.elf: start.S start.ld
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$(CC) -nostdlib -o start.elf start.S -T start.ld $(LDLIBS)
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chmod -x start.elf
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clean:
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rm -f *.o *.d *.tmp start.elf
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rm -f firmware.elf firmware.hex firmware32.hex
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@ -2,7 +2,7 @@
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import re
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symbol = re.compile("\s*0x([0-9a-f]+)\s+([\w_]+)\s*$")
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symbol = re.compile("\s*0x([0-9a-f]+)\s+([\w_]+)")
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symbol_map = {}
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with open("firmware.map", "r") as fh:
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for fd in fh:
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@ -12,6 +12,8 @@ with open("firmware.map", "r") as fh:
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symbol_map[addr] = sym.group(2)
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with open("firmware_dbg.v", "w") as fh:
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for k, v in symbol_map.items():
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fh.write("`define C_SYM_{1:s} 32'h{0:08x}\n".format(k, v.upper()))
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fh.write(" task firmware_dbg;\n")
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fh.write(" input [31:0] addr;\n");
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fh.write(" begin\n");
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@ -7,13 +7,12 @@ binary, for any purpose, commercial or non-commercial, and by any
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means.
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*/
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/* starting address needs to be > 0 due to known bug in RISCV/GNU linker */
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MEMORY {
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rom(rwx) : ORIGIN = 0x00000100, LENGTH = 63k
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ram(rwx) : ORIGIN = 0x00020000, LENGTH = 16k
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}
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C_STACK_SIZE = 512;
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ENTRY(_pvstart);
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SECTIONS {
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@ -34,7 +33,6 @@ SECTIONS {
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. = ALIGN(4);
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_edata = .;
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} >ram AT>rom
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/* } >ram */
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.bss : {
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_bss_start = .;
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@ -1,8 +1,6 @@
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.section .text
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.global _start
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.global _pvstart
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.global _data
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.global _data_lma
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_pvstart:
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/* zero-initialize all registers */
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@ -42,10 +40,7 @@ addi x31, zero, 0
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lui sp, %hi(4*1024*1024)
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addi sp, sp, %lo(4*1024*1024)
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/*
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lui sp, %hi(0x100000)
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addi sp, sp, %lo(0x100000)
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*/
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/* push zeros on the stack for argc and argv */
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/* (stack is aligned to 16 bytes in riscv calling convention) */
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addi sp,sp,-16
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@ -54,32 +49,4 @@ sw zero,4(sp)
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sw zero,8(sp)
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sw zero,12(sp)
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/*
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// Load data section
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la a0, _data_lma
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la a1, _data
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la a2, _edata
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bgeu a1, a2, 2f
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1:
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lw t0, (a0)
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sw t0, (a1)
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addi a0, a0, 4
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addi a1, a1, 4
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bltu a1, a2, 1b
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2:
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// Clear bss section
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la a0, _bss_start
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la a1, _bss_end
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bgeu a0, a1, 2f
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1:
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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2:
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*/
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/* jump to libc init */
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/*j _ftext
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*/
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j _start
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@ -3,8 +3,9 @@
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//`undef WRITE_VCD
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`undef MEM8BIT
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// define the size of our ROM
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// simulates ROM by suppressing writes below this address
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`define ROM_SIZE 32'h0001_00FF
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//`define ROM_SIZE 32'h0000_0000
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module testbench;
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reg clk = 1;
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@ -52,10 +53,10 @@ module testbench;
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end
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`else
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reg [31:0] memory [0:MEM_SIZE/4-1];
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`define data_lma 32'hc430
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`define data 32'h20000
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`define edata 32'h209b0
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integer x;
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// simulate hardware assist of clearing RAM and copying ROM data into
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// memory
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initial
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begin
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// clear memory
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@ -63,8 +64,8 @@ module testbench;
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// load rom contents
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$readmemh("firmware32.hex", memory);
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// copy .data section
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for (x=0; x<(`edata - `data); x=x+4)
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memory[(`data+x)/4] = memory[(`data_lma+x)/4];
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for (x=0; x<(`C_SYM__BSS_START - `C_SYM___GLOBAL_POINTER); x=x+4)
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memory[(`C_SYM___GLOBAL_POINTER+x)/4] = memory[(`C_SYM__DATA_LMA+x)/4];
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end
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`endif
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@ -101,7 +102,9 @@ module testbench;
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endcase
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end
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if (mem_valid && mem_ready) begin
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// firmware_dbg(mem_addr);
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`ifdef FIRMWARE_DEBUG_ADDR
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firmware_dbg(mem_addr);
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`endif
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if ((mem_wstrb == 4'h0) && (mem_rdata === 32'bx)) $display("READ FROM UNITIALIZED ADDR=%x", mem_addr);
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`ifdef VERBOSE_MEM
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if (|mem_wstrb)
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