mirror of https://github.com/YosysHQ/picorv32.git
Added Openlane support with CI
As part of my and Olof Kindgrens work on adding Openlane support to Edalize, we've noticed that a lot of the examples in the Openlane repository are from other known sources and we would prefer to upstream when possible. This commit adds a tcl file with parameters for Openlane, a sky130 target using Openlane in the core, and a github action for building it on push.
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name: build-openlane-sky130
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on: [push]
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jobs:
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build-picorv32:
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runs-on: ubuntu-latest
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steps:
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- name: Checkout repo
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uses: actions/checkout@v2
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with:
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path: picorv32
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- name: Checkout pdk
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uses: actions/checkout@v2
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with:
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repository: olofk/pdklite
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path: pdklite
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- run: echo "PDK_ROOT=$GITHUB_WORKSPACE/pdklite" >> $GITHUB_ENV
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- run: echo "EDALIZE_LAUNCHER=${GITHUB_WORKSPACE}/openlane_runner.py" >> $GITHUB_ENV
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- run: pip3 install --user -e "git+https://github.com/olofk/edalize.git#egg=edalize"
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- run: pip3 install fusesoc
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- run: docker pull efabless/openlane:v0.12
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- run: wget https://raw.githubusercontent.com/olofk/subservient/main/openlane_runner.py
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- run: chmod +x openlane_runner.py
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- run: fusesoc library add fpganes $GITHUB_WORKSPACE/picorv32
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- run: fusesoc run --target=sky130 picorv32
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# These values are taken from the designs examples in the Openlane repository
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set ::env(CLOCK_PORT) "clk"
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set ::env(CLOCK_NET) $::env(CLOCK_PORT)
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set ::env(GLB_RT_ADJUSTMENT) 0.1
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set ::env(SYNTH_MAX_FANOUT) 6
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set ::env(CLOCK_PERIOD) "24.73"
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set ::env(FP_CORE_UTIL) 30
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set ::env(PL_TARGET_DENSITY) [ expr ($::env(FP_CORE_UTIL)+5) / 100.0 ]
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@ -1,5 +1,5 @@
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CAPI=2:
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name : ::picorv32:0-r1
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name : ::picorv32:1.0
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filesets:
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rtl:
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@ -18,6 +18,9 @@ filesets:
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tb_verilator:
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files:
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- testbench.cc : {file_type : cppSource}
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openlane:
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files:
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- openlane_params.tcl : {file_type : tclSource}
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targets:
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default:
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@ -29,6 +32,19 @@ targets:
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verilator:
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mode : lint-only
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toplevel : [picorv32_axi]
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sky130:
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default_tool : openlane
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filesets : [rtl, openlane]
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parameters :
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- ENABLE_REGS_16_31=0
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- ENABLE_REGS_DUALPORT=0
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- BARREL_SHIFTER=1
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- TWO_CYCLE_ALU=1
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- ENABLE_FAST_MUL=1
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- ENABLE_IRQ=1
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toplevel : picorv32
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test:
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default_tool: icarus
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filesets: [rtl, tb, "tool_verilator? (tb_verilator)"]
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toplevel:
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- "tool_verilator? (picorv32_wrapper)"
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- "!tool_verilator? (testbench)"
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tools:
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verilator :
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cli_parser : fusesoc
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@ -58,6 +74,24 @@ parameters:
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datatype : str
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default : 1
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paramtype : vlogdefine
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ENABLE_REGS_16_31:
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datatype : int
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paramtype : vlogparam
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ENABLE_REGS_DUALPORT:
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datatype : int
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paramtype : vlogparam
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BARREL_SHIFTER:
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datatype : int
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paramtype : vlogparam
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TWO_CYCLE_ALU:
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datatype : int
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paramtype : vlogparam
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ENABLE_FAST_MUL:
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datatype : int
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paramtype : vlogparam
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ENABLE_IRQ:
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datatype : int
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paramtype : vlogparam
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axi_test:
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datatype : bool
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paramtype : plusarg
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@ -75,4 +109,4 @@ parameters:
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paramtype : plusarg
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verbose:
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datatype : bool
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paramtype : plusarg
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paramtype : plusarg
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