mirror of https://github.com/YosysHQ/picorv32.git
Added optional FFs to picorv32_pcpi_fast_mul
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picorv32.v
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picorv32.v
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@ -1916,7 +1916,9 @@ module picorv32_pcpi_mul #(
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end
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end
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endmodule
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endmodule
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module picorv32_pcpi_fast_mul (
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module picorv32_pcpi_fast_mul #(
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parameter EXTRA_FFS = 0
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) (
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input clk, resetn,
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input clk, resetn,
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input pcpi_valid,
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input pcpi_valid,
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@ -1934,9 +1936,10 @@ module picorv32_pcpi_fast_mul (
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wire instr_rs1_signed = |{instr_mulh, instr_mulhsu};
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wire instr_rs1_signed = |{instr_mulh, instr_mulhsu};
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wire instr_rs2_signed = |{instr_mulh};
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wire instr_rs2_signed = |{instr_mulh};
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reg active1, active2, shift_out;
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reg shift_out;
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reg [32:0] rs1, rs2;
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reg [3:0] active;
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reg [63:0] rd;
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reg [32:0] rs1, rs2, rs1_q, rs2_q;
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reg [63:0] rd, rd_q;
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always @* begin
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always @* begin
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instr_mul = 0;
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instr_mul = 0;
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@ -1955,11 +1958,17 @@ module picorv32_pcpi_fast_mul (
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end
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end
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always @(posedge clk) begin
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always @(posedge clk) begin
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rd <= $signed(rs1) * $signed(rs2);
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rs1_q <= rs1;
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rs2_q <= rs2;
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rd_q <= rd;
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end
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end
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (instr_any_mul && !active1 && !active2) begin
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rd <= $signed(EXTRA_FFS ? rs1_q : rs1) * $signed(EXTRA_FFS ? rs2_q : rs2);
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end
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always @(posedge clk) begin
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if (instr_any_mul && !(EXTRA_FFS ? active[3:0] : active[1:0])) begin
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if (instr_rs1_signed)
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if (instr_rs1_signed)
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rs1 <= $signed(pcpi_rs1);
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rs1 <= $signed(pcpi_rs1);
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else
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else
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@ -1969,23 +1978,22 @@ module picorv32_pcpi_fast_mul (
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rs2 <= $signed(pcpi_rs2);
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rs2 <= $signed(pcpi_rs2);
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else
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else
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rs2 <= $unsigned(pcpi_rs2);
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rs2 <= $unsigned(pcpi_rs2);
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active1 <= 1;
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active[0] <= 1;
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end else begin
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end else begin
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active1 <= 0;
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active[0] <= 0;
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end
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end
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active2 <= active1;
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active[3:1] <= active;
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shift_out <= instr_any_mulh;
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shift_out <= instr_any_mulh;
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if (!resetn) begin
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if (!resetn)
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active1 <= 0;
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active <= 0;
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active2 <= 0;
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end
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end
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end
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assign pcpi_wr = active2;
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assign pcpi_wr = active[EXTRA_FFS ? 3 : 1];
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assign pcpi_wait = 0;
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assign pcpi_wait = 0;
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assign pcpi_ready = active2;
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assign pcpi_ready = active[EXTRA_FFS ? 3 : 1];
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assign pcpi_rd = shift_out ? rd >> 32 : rd;
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assign pcpi_rd = shift_out ? (EXTRA_FFS ? rd_q : rd) >> 32 : (EXTRA_FFS ? rd_q : rd);
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endmodule
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endmodule
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