mirror of https://github.com/YosysHQ/picorv32.git
Update riscv-formal altops bitmasks
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picorv32.v
16
picorv32.v
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@ -2331,10 +2331,10 @@ module picorv32_pcpi_fast_mul #(
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assign pcpi_ready = active[EXTRA_MUL_FFS ? 3 : 1];
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`ifdef RISCV_FORMAL_ALTOPS
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assign pcpi_rd =
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instr_mul ? (pcpi_rs1 + pcpi_rs2) ^ 32'h4d554c01 :
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instr_mulh ? (pcpi_rs1 + pcpi_rs2) ^ 32'h4d554c02 :
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instr_mulhsu ? (pcpi_rs1 - pcpi_rs2) ^ 32'h4d554c03 :
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instr_mulhu ? (pcpi_rs1 + pcpi_rs2) ^ 32'h4d554c04 : 1'bx;
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instr_mul ? (pcpi_rs1 + pcpi_rs2) ^ 32'h5876063e :
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instr_mulh ? (pcpi_rs1 + pcpi_rs2) ^ 32'hf6583fb7 :
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instr_mulhsu ? (pcpi_rs1 - pcpi_rs2) ^ 32'hecfbe137 :
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instr_mulhu ? (pcpi_rs1 + pcpi_rs2) ^ 32'h949ce5e8 : 1'bx;
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`else
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assign pcpi_rd = shift_out ? (EXTRA_MUL_FFS ? rd_q : rd) >> 32 : (EXTRA_MUL_FFS ? rd_q : rd);
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`endif
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@ -2411,10 +2411,10 @@ module picorv32_pcpi_div (
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pcpi_wr <= 1;
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`ifdef RISCV_FORMAL_ALTOPS
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case (1)
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instr_div: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h44495601;
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instr_divu: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h44495602;
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instr_rem: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h52454D01;
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instr_remu: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h52454D02;
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instr_div: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h7f8529ec;
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instr_divu: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h10e8fd70;
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instr_rem: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h8da68fa5;
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instr_remu: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h3138d0e1;
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endcase
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`else
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if (instr_div || instr_divu)
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