mirror of https://github.com/YosysHQ/picorv32.git
Added console out to csmith spike
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parent
6c69b3812e
commit
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@ -21,6 +21,7 @@ riscv-isa-sim/build.ok: riscv-fesvr/build.ok
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git clone https://github.com/riscv/riscv-isa-sim.git riscv-isa-sim
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cd riscv-isa-sim && git checkout 10ae74e
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cd riscv-isa-sim && patch -p1 < ../riscv-isa-sim-exit.diff
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cd riscv-isa-sim && patch -p1 < ../riscv-isa-sim-console.diff
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cd riscv-isa-sim && LDFLAGS="-L../riscv-fesvr" ./configure --with-isa=RV32IMC
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+cd riscv-isa-sim && ln -s ../riscv-fesvr/fesvr . && make && touch build.ok
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@ -0,0 +1,14 @@
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diff --git a/riscv/mmu.h b/riscv/mmu.h
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index b9948c5..bee1f8b 100644
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--- a/riscv/mmu.h
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+++ b/riscv/mmu.h
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@@ -67,7 +67,8 @@ public:
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if (addr & (sizeof(type##_t)-1)) \
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throw trap_store_address_misaligned(addr); \
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reg_t vpn = addr >> PGSHIFT; \
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- if (likely(tlb_store_tag[vpn % TLB_ENTRIES] == vpn)) \
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+ if (addr == 0x10000000) putchar(val), fflush(stdout); \
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+ else if (likely(tlb_store_tag[vpn % TLB_ENTRIES] == vpn)) \
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*(type##_t*)(tlb_data[vpn % TLB_ENTRIES] + addr) = val; \
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else \
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store_slow_path(addr, sizeof(type##_t), (const uint8_t*)&val); \
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