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4900ebb693
The IceStorm example core doesn't include compressed instructions or the MULT extension; it is an rv32i core, not rv32i[m|c]. If the given riscv32 toolchain is not explicitly told to generate rv32i code for the firmware, it may generate invalid instructions which cause a trap during simulation or on the hardware itself (although CATCH_ILLINSN is set to zero in this case, too). Luckily, any rv32i* toolchain (rv32imc for example) can fit the bill here -- there's no use of libgcc or anything (which might introduce illegal instructions generated previously) so just forcing the compiler to generate the right code works nicely. Signed-off-by: Austin Seipp <aseipp@pobox.com> |
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| csmith | ||
| cxxdemo | ||
| icestorm | ||
| presyn | ||
| quartus | ||
| romload | ||
| smtbmc | ||
| tomthumbtg | ||
| torture | ||
| vivado | ||
| yosys | ||
| yosys-cmp | ||