picorv32/scripts/vivado/synth_area.tcl
2015-06-26 23:41:13 +02:00

12 lines
191 B
Tcl

read_verilog ../../picorv32.v
read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top picorv32_axi
opt_design
report_utilization
# report_timing
write_verilog -force synth_area.v