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picorv32
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picorv32/firmware
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Clifford Wolf f4bb91b060 RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
..
README More README stuff 2015-06-28 12:20:23 +02:00
custom_ops.S Removed trailing whitespaces 2015-07-02 10:49:35 +02:00
firmware.h Test firmware: Added print_hex() digits arg 2015-11-19 14:01:16 +01:00
irq.c RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
makehex.py Using "#!/usr/bin/env python3" 2015-08-22 09:54:21 +02:00
multest.c RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
print.c Test firmware: Added print_hex() digits arg 2015-11-19 14:01:16 +01:00
sections.lds Improvements in firmware/sections.lds 2015-10-30 15:58:29 +01:00
sieve.c RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
start.S RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
stats.c Turned gcc warnings up to eleven 2015-07-04 11:47:19 +02:00

README 

A simple test firmware. This code is in the public domain. Simply copy whatever
you can use.