upsilon/doc
Peter McGoron 487d638aa5 Integrate Waveform into SoC; Rework PreemptiveInterface
New master buses can be added to PreemptiveInterface throughout the
code, simplifying the main SoC code. This removes the requirement that
the amount of masters to the interface needs to be known at
instantiation time.
2024-03-06 21:17:51 +00:00
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copying make lawyers happy 2023-06-15 12:24:35 -04:00
controller_manual.rst Documentation and register location generation 2024-02-28 13:28:06 +00:00
docker.md Documentation and register location generation 2024-02-28 13:28:06 +00:00
gateware.rst Integrate Waveform into SoC; Rework PreemptiveInterface 2024-03-06 21:17:51 +00:00
verilog_manual.md Documentation, fix parameter passing 2024-02-26 06:02:48 +00:00