Fix relaxedPc/DYNAMIC_TARGET interaction
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parent
dc968020c4
commit
5e7dd02bf7
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@ -33,12 +33,13 @@ object TestsWorkspace {
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plugins = List(
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new IBusSimplePlugin(
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resetVector = 0x80000000l,
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relaxedPcCalculation = false,
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relaxedPcCalculation = true,
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relaxedBusCmdValid = false,
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prediction = DYNAMIC_TARGET,
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historyRamSizeLog2 = 10,
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catchAccessFault = true,
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compressedGen = true,
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busLatencyMin = 3
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compressedGen = false,
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busLatencyMin = 1
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),
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// new IBusCachedPlugin(
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// resetVector = 0x80000000l,
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@ -126,18 +126,21 @@ abstract class IBusFetcherImpl(val catchAccessFault : Boolean,
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}
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}
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preOutput.valid := RegNext(True) init (False) // && !jump.pcLoad.valid
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preOutput.payload := pcReg
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//application of the selected jump request
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if(predictionPcLoad != null) {
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when(predictionPcLoad.valid) {
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pcReg := predictionPcLoad.payload
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preOutput.valid := False
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}
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}
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when(jump.pcLoad.valid) {
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pcReg := jump.pcLoad.payload
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}
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preOutput.valid := RegNext(True) init (False) // && !jump.pcLoad.valid
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preOutput.payload := pcReg
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} else new PcFetch{
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//PC calculation without Jump
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val pcReg = Reg(UInt(32 bits)) init(if(resetVector != null) resetVector else externalResetVector) addAttribute(Verilator.public)
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@ -202,8 +202,8 @@ class IBusDimension extends VexRiscvDimension("IBus") {
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busLatencyMin = latency,
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injectorStage = injectorStage
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)
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}) :+ new VexRiscvPosition("FullRelaxed"){
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override def testParam = "IBUS=SIMPLE"
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}) :+ new VexRiscvPosition("FullRelaxedDeep"){
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override def testParam = "IBUS=SIMPLE COMPRESSED=yes"
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override def applyOn(config: VexRiscvConfig): Unit = config.plugins += new IBusSimplePlugin(
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resetVector = 0x80000000l,
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relaxedPcCalculation = true,
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@ -212,10 +212,21 @@ class IBusDimension extends VexRiscvDimension("IBus") {
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catchAccessFault = false,
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compressedGen = true,
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busLatencyMin = 3,
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injectorStage = false
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)
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} :+ new VexRiscvPosition("FullRelaxedStd") {
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override def testParam = "IBUS=SIMPLE"
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override def applyOn(config: VexRiscvConfig): Unit = config.plugins += new IBusSimplePlugin(
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resetVector = 0x80000000l,
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relaxedPcCalculation = true,
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relaxedBusCmdValid = true,
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prediction = STATIC,
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catchAccessFault = false,
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compressedGen = false,
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busLatencyMin = 1,
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injectorStage = true
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)
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}
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}
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