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Fix VexRiscvBmbGenerator.hardwareBreakpointCount default value

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Dolu1990 2021-07-30 16:51:07 +02:00
parent 671bd30953
commit 805bd56077
1 changed files with 1 additions and 1 deletions
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src/main/scala/vexriscv/VexRiscvBmbGenerator.scala
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@ -25,7 +25,7 @@ case class VexRiscvBmbGenerator()(implicit interconnectSmp: BmbInterconnectGener
val debugClockDomain = Handle[ClockDomain] val debugClockDomain = Handle[ClockDomain]
val debugReset = Handle[Bool] val debugReset = Handle[Bool]
val debugAskReset = Handle[() => Unit] val debugAskReset = Handle[() => Unit]
val hardwareBreakpointCount = Handle(0) val hardwareBreakpointCount = Handle.sync(0)
val iBus, dBus = Handle[Bmb] val iBus, dBus = Handle[Bmb]